IC Design Philosophy

Integrated-circuit fabrication technology poses constraints on-and provides opportunities to-the circuit designer. Thus, while chip-area considerations dictate that large- and even moderate-value resistors are to be avoided, constant-current sources are readily available Very small capacitors, in the Pico farad and fraction of a Pico farad range, however, are easy to fabricate in IC MOS technology and can be combined with MOS amplifiers and MOS switches to realize a wide range of signal processing functions. As a general rule, in designing IC MOS circuits, one should strive to realize as many of the functions required as possible using MOS transistors only and, when needed, small MOS capacitors. MOS transistors can be sized; that is, their W and L values can be selected, to fit a wide range of design requirements.

At this juncture, it is useful to mention that to pack a larger number of devices on the same IC chip, the trend has been to reduce the device dimensions. At the time of this writing (2006), CMOS process technologies capable of producing devices with a 0.06-µm minimum channel length are in use. Such small devices need to operate with dc voltage supplies close to 1 V. While low-voltage operation can help to reduce power dissipation, it poses a host of challenges to the circuit designer. For instance, such MOS transistors must be operated with overdrive voltages of only 0.2 V or so. In our discussion of MOS amplifiers, we will make frequent comments on such issues.

The MOS-amplifier circuits that we shall study will be designed almost entirely using MOSFETs of both polarities-that is, NMOS and PMOS-as are readily available in CMOS technology. As mentioned earlier, CMOS is currently the most widely used IC technology for analog and digital as well as combined analog and digital (or mixed-signal) applications. Nevertheless, bipolar integrated circuits still offer many exciting opportunities to the analog design engineer. This is especially the case for general-propose circuit packages, such as high-quality op amps that are intended for assembly on printed-circuit (pc) boards (as opposed to being part of a system-on-chip). As well, bipolar circuits can provide much higher output currents and are favored for certain applications, such as in the automotive industry, for their high reliability under severe environmental conditions. Finally, bipolar circuits can be combined with CMOS in innovative and exciting ways.

References 

" IC Design Philosophy " !

Comparison of CMOS and Bipolar Analog IC

a)      Transconductance of bipolar transistors is very high. So with bipolar it is possible to have circuit of very high gain and high gain bandwidth. CMOS designs are limited to low gains.

b)     CMOS transistors can work at a lower voltage supply than Bipolar. But by modern technology V_T of CMOS have decreased to ~ 0.5 volts. This has brought in several advantages as shown in Table 1.1.

c)     Basically CMOS technology is more popular because of the main advantage of high packaging density; and the strengths of CMOS has taken power over it’s weaknesses making it the most popular VLSI technology today.

d)     Low power dissipation

e)      Small size.

f)       High speed.

g)     Work at small current.

h)     Low cost.

i)        Don't effect with temperature.

Table 1.1   Comparison of physical characteristics of bipolar and CMOS-based IBM                    S/390   systems.
	ES/9000* 9X2	S/390* G6
Technology	Bipolar	CMOS
Total no. of chips	5000	31
Total no. of parts	6659	92
Weight (lb)	31,145	2057
Power requirement (kVA)	153	5.5
Chips per processor	390	1
Maximum memory (GB)	10	32
Space (sq ft)	671.6	51.9

In this project the aim was to design and simulation of electronic circuits for modern wireless and satellite communications with CMOS technology, so we must improve and search what of these categories of Silicon Technology is the best.

In this chapter, we begin with a brief section on the design philosophy of integrated circuits, and how it differs from that of discrete circuits. Throughout this section, MOS is presented side-by-side, which allows a certain economy in presentation and more importantly, provides an opportunity to compare and contrast the types. Toward that end, This section provides a comprehensive comparison of the attributes of the two transistor types. This should serve both as a review as well as a guide to very interesting similarities and differences between the two devices.

" Comparison of CMOS and Bipolar Analog IC " !

Very Large Scale Integration

The Very Large Scale Integration (VLSI) technology today has made possible integration of millions of transistors on single Integrated Circuit (IC) chip. Modern VLSI has attained features in sub nanometer, e.g. .06-micron technology is very popular these days.  The search is towards bringing more and more transistors in single chip by going more towards deep sub micron technology. Now the art is system – on – chip or integrating a whole system on a single IC chip that comprises of several analog and digital functions.

The VLSI design can be classified into three categories depending on the way of designing: Analog design, Digital design and Mixed Signal (both analog and digital) design. The regularity and granularity of digital circuits have made Digital designs automated to a good extent, with the help of CAD tools, given a behavioral description of the function desired. Whereas for analog circuit design a more hands on design approach is required.

        CMOS Technology       

          Nowadays most popular Integrated Circuit Design Technology are: Bipolar and Metal Oxide Semiconductor (MOS). The classifications of various groups are described in Fig 1.1.

Categories of Silicon Technology

Fig 1.1 : Categories of Silicon Technology

When design of system on chip is the question then CMOS technology gives more advantages compared to the others. So, analog design using CMOS is very popular today. Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) technology is used often when a high degree of performance is required. BiCMOS is much costlier then CMOS design. Hence still the most prevalent design technique is CMOS.

 

" Very Large Scale Integration " !

Low-Power Design

           Building wireless systems for low-power operation is one of the most important and challenging design goals. While low power is a design goal for almost all wireless systems, it is an especially challenging boundary condition for 3G systems. This is due to two issues: First, the power amplifier (PA), which determines to a large extent the talk-time of present terminals, has to cope with a linear modulation format (basically QPSK) in 3G systems.

Therefore, the RF envelope shows high amplitude variations, which requires a linear PA operation over a wide amplitude range that is only possible with low efficiency. In general, low-power design is a multi-disciplinary problem since transceiver architecture and circuit design determine the instantaneous power consumption, while the average power consumption depends to a large extent also on a good power management at the system and protocol levels. The RF PA in the transmitter front-end is the dominant power consumption block in any wireless communication system.

 

        Integration of RF and Base band Functionalities

A steadily increasing level of integration will probably lead to single-chip transceiver solutions. This includes also the integration of the analog front-end with the digital base band part. There are many obstacles like, e.g., interference due to substrate coupling, different supply voltage requirements, heat dissipation problems, pin count, etc., but benefits like reduced component count and required printed circuit board area as well as enhanced functionality can be attained.

" Low-Power Design " !

RF CMOS Technology Approach

          CMOS technology dominates the digital domain and for a long time it was considered to be not suitable for the design of RFICs. This was due to factors like, e.g., low Q values for integrated inductors, a limited set of available active and passive devices, the fact that CMOS technology is optimized for digital applications, the missing of accurate device models at GHz frequencies, or a worse  g_m/I  of CMOS transistors compared to bipolar transistors. Advances in CMOS technology, while mainly driven by digital needs pushed the transit frequency of today’s 0.13 μm CMOS transistors beyond 50 GHz. Together with improved device modeling and the growing number of interconnect layers, which allows for the realization of improved passive components, RF CMOS has become increasingly popular in the last few years. With an integral design approach, taking into account aspects from system level down to device physics, even applications in the 5 GHz range and beyond have been realized. Advances with respect to improved devices, circuit topologies, and system level architecture also make RF CMOS a strong contender for W-CDMA applications. The majority of the published RFICs for 3G applications is still fabricated in bipolar or BiCMOS technology. However, 3G CMOS solutions are developed in industry and academia and there is little doubt that in a few years CMOS will have a substantial or even a dominant market share in RF applications.

" RF CMOS Technology Approach " !

Satellite, Wireless and Cellular Phones

          The tremendous success of satellite, wireless and cellular phones during the last several years has opened up the market for many other wireless systems like, e.g., wireless local area networks (WLANs), cordless phones, Bluetooth, etc. Several factors contributed to this success story. First, appropriate open standards for so-called second generation (2G) mobile communication systems have been developed, which guarantee interoperability of equipment from different manufacturers. Second, the needs of the users to communicate while on the move can perfectly be satisfied with 2G systems and additional services like short messaging services (SMS) turned out to become highly accepted. Third, the advances in silicon RF bipolar technology allowed building first radio frequency integrated circuits (RFIC) at the end of the 1980s. This made it possible to shrink mobile phones to acceptable form factors and increase the stand-by and talk-times to satisfying values. At the same time tremendous progress in deep sub-micrometer very large scale integration (VLSI) processing technology enabled the realization of digital IC's with powerful signal processing capabilities.

Today's mobile phones contain more than one million transistors, with only a small fraction operating in the RF range and the rest performing base band signal processing. Despite the by orders of magnitude higher complexity of the base band part, the RF front-end is still the design bottleneck of the entire system. One reason is that most of the current design environments have difficulties with the handling of the analog circuits which makes it impossible to perform system-level simulations to access tradeoffs and architectural decisions across the analog-digital boundary. Another reason for this design bottleneck is the fact that the design requires a thorough understanding of such diverse disciplines as communication theory, microwave theory, computer-aided design, multiple access, signal propagation, theory of random signals, wireless standards, and transceiver architectures, which are not directly related to IC design .

" Satellite, Wireless and Cellular Phones " !